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» Architectures for function evaluation on FPGAs
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APCCAS
2006
IEEE
224views Hardware» more  APCCAS 2006»
13 years 9 months ago
A Multi-Context FPGA Using a Floating-Gate-MOS Functional Pass-Gate and Its CAD Environment
Abstract-- Multi-context FPGAs (MC-FPGAs) have multiple memory bits per configuration bit forming configuration planes for fast switching between contexts. The additional memory pl...
Masanori Hariyama, Michitaka Kameyama
IPPS
2007
IEEE
14 years 2 months ago
High Performance Database Searching with HMMer on FPGAs
1 Profile Hidden Markov Models (profile HMMs) are used as a popular bioinformatics tool for sensitive database searching, e.g. a set of not annotated protein sequences is compared...
Timothy F. Oliver, Leow Yuan Yeow, Bertil Schmidt
CC
2008
Springer
240views System Software» more  CC 2008»
13 years 9 months ago
Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
Etienne Bergeron, Marc Feeley, Jean-Pierre David
FPL
2000
Springer
155views Hardware» more  FPL 2000»
13 years 11 months ago
Synthesis and Implementation of RAM-Based Finite State Machines in FPGAs
This paper discusses the design and implementation of finite state machines (FSM) with combinational circuits that are built primarily from RAM blocks. It suggests a novel state as...
Valery Sklyarov
FPGA
2005
ACM
122views FPGA» more  FPGA 2005»
14 years 1 months ago
Power modeling and architecture evaluation for FPGA with novel circuits for Vdd programmability
Vdd-programmable FPGAs have been proposed recently to reduce FPGA power, where Vdd levels can be customized for different circuit elements and unused circuit elements can be powe...
Yan Lin, Fei Li, Lei He