643 search results - page 15 / 129 » Architectures for function evaluation on FPGAs |
DAC
2004
ACM
14 years 8 months ago
2004
ACM
This paper shows a method to decompose a given multipleoutput circuit into two circuits with intermediate outputs. We use a BDD for characteristic function (BDD for CF) to represe...
FPGA
1997
ACM
13 years 12 months ago
1997
ACM
This paper presents a novel system architecture applicable to high-performance and flexible transport data processing which includes complex protocol operation and a network contr...
VLSISP
2008
13 years 6 months ago
2008
In this paper, we introduce a new method for watermarking of IP cores for FPGA architectures where the signature (watermark) is detected at the power supply pins of the FPGA. This ...
FPL
2007
Springer
14 years 1 months ago
2007
Springer
This paper introduces a software supported methodology for exploring/evaluating 3D FPGA architectures. Two new CAD tools are developed: (i) the 3DPRO for placement and routing on ...
FPGA
2000
ACM
13 years 11 months ago
2000
ACM
In this paper we introduce a new Simulated Annealingbased timing-driven placement algorithm for FPGAs. This paper has three main contributions. First, our algorithm employs a nove...