643 search results - page 26 / 129 » Architectures for function evaluation on FPGAs |
FPL
2008
Springer
13 years 9 months ago
2008
Springer
This paper considers the implementation of an annealing technique for dynamic power reduction in FPGAs. The proposed method comprises a power-aware objective function for placemen...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
The ever increasing complexity and heterogeneity of modern System-on-Chip (SoC) architectures make an early and systematic exploration of alternative solutions mandatory. Efficien...
ARITH
1999
IEEE
14 years 2 days ago
1999
IEEE
In this paper we design a CORDIC architecture for variable
BMCBI
2010
13 years 7 months ago
2010
Background: The increasing number of sequenced genomes provides the basis for exploring the genetic and functional diversity within the tree of life. Only a tiny fraction of the e...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this paper, we model each task ...