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» Architectures for function evaluation on FPGAs
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ICPADS
2005
IEEE
15 years 8 months ago
An Evaluation Mechanism for QoS Management in Wireless Systems
The evaluation of QoS requirements is one of the critical functions that span both the design and the run-time phases of QoS management. This paper presents an architecture for Qo...
Behzad Bordbar, Rachid Anane, Kozo Okano
ASAP
2004
IEEE
141views Hardware» more  ASAP 2004»
15 years 6 months ago
Evaluating Instruction Set Extensions for Fast Arithmetic on Binary Finite Fields
Binary finite fields GF(2n ) are very commonly used in cryptography, particularly in publickey algorithms such as Elliptic Curve Cryptography (ECC). On word-oriented programmable ...
A. Murat Fiskiran, Ruby B. Lee
DAC
2010
ACM
15 years 6 months ago
Lattice-based computation of Boolean functions
This paper studies the implementation of Boolean functions with lattices of two-dimensional switches. Each switch is controlled by a Boolean literal. If the literal is 1, the swit...
Mustafa Altun, Marc D. Riedel
FPL
2008
Springer
110views Hardware» more  FPL 2008»
15 years 4 months ago
Automatic generation of run-time parameterizable configurations
In many applications, subsequent data manipulations differ only in a small set of parameter values. Because of their reconfigurability, FPGAs (Field Programmable Gate Arrays) can ...
Karel Bruneel, Dirk Stroobandt
DAC
2004
ACM
16 years 4 months ago
Virtual memory window for application-specific reconfigurable coprocessors
Reconfigurable Systems-on-Chip (SoCs) on the market consist of full-fledged processors and large Field-Programmable Gate-Arrays (FPGAs). The latter can be used to implement the sy...
Miljan Vuletic, Laura Pozzi, Paolo Ienne