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» Architectures for function evaluation on FPGAs
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DAC
1998
ACM
14 years 2 months ago
OCCOM: Efficient Computation of Observability-Based Code Coverage Metrics for Functional Verification
—Functional simulation is still the primary workhorse for verifying the functional correctness of hardware designs. Functional verification is necessarily incomplete because it i...
Farzan Fallah, Srinivas Devadas, Kurt Keutzer
MSWIM
2009
ACM
14 years 5 months ago
Design and evaluation of host identity protocol (HIP) simulation framework for INET/OMNeT++
Host Identity Protocol (HIP) decouples IP addresses from higher layer Internet applications by proposing a new, cryptographic namespace for host identities. HIP has great potentia...
László Bokor, Szabolcs Novácz...
IFL
2004
Springer
138views Formal Methods» more  IFL 2004»
14 years 3 months ago
A Rational Deconstruction of Landin's SECD Machine
Landin’s SECD machine was the first abstract machine for the λ-calculus viewed as a programming language. Both theoretically as a model of computation and practically as an ide...
Olivier Danvy
ENTCS
2008
106views more  ENTCS 2008»
13 years 10 months ago
Modelling Adaptive Systems in ForSyDe
Emerging architectures such as partially reconfigurable FPGAs provide a huge potential for adaptivity in the area of embedded systems. Since many system functions are only execute...
Ingo Sander, Axel Jantsch
MICRO
1997
IEEE
105views Hardware» more  MICRO 1997»
14 years 2 months ago
The Multicluster Architecture: Reducing Cycle Time Through Partitioning
The multicluster architecture that we introduce offers a decentralized, dynamically-scheduled architecture, in which the register files, dispatch queue, and functional units of t...
Keith I. Farkas, Paul Chow, Norman P. Jouppi, Zvon...