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» Architectures for function evaluation on FPGAs
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CASES
2004
ACM
14 years 3 months ago
A low power architecture for embedded perception
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...
Binu K. Mathew, Al Davis, Michael Parker
ICDS
2008
IEEE
14 years 4 months ago
Reliable Server Pooling - A Novel IETF Architecture for Availability-Sensitive Services
Reliable Server Pooling (RSerPool) is a light-weight protocol framework for server redundancy and session failover, currently still under standardization by the IETF RSerPool WG. ...
Thomas Dreibholz, Erwin P. Rathgeb
EH
2004
IEEE
117views Hardware» more  EH 2004»
14 years 1 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
IJNSEC
2008
106views more  IJNSEC 2008»
13 years 10 months ago
Parallel Hardware Architectures for the Cryptographic Tate Pairing
Identity-based cryptography uses pairing functions,which are sophisticated bilinear maps defined on elliptic curves.Computing pairings efficiently in software is presently a relev...
Guido Marco Bertoni, Luca Breveglieri, Pasqualina ...
TC
2010
13 years 4 months ago
Architectures and Execution Models for Hardware/Software Compilation and Their System-Level Realization
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...
Holger Lange, Andreas Koch