16 search results - page 3 / 4 » Arithmetic Circuits Combining Residue and Signed-Digit Repre... |
DAC
2000
ACM
14 years 8 months ago
2000
ACM
Joint module selection and retiming is a powerful technique to optimize the implementation cost and the speed of a circuit specified using a synchronous data-flow graph (DFG). In ...
EUROGP
2000
Springer
13 years 11 months ago
2000
Springer
1 The function level evolvable hardware approach to synthesize the combinational multiple-valued and binary logic functions is proposed in rst time. The new representation of logic...
DAC
1997
ACM
13 years 11 months ago
1997
ACM
In this paper, we introduce a Shared Multiple Rooted XORbased Decomposition Diagram XORDD to represent functions with multiple outputs. Based on the XORDD representation, we dev...
ECCC
2011
13 years 2 months ago
2011
Polynomial identity testing (PIT) problem is known to be challenging even for constant depth arithmetic circuits. In this work, we study the complexity of two special but natural ...
PKC
2012
Springer
11 years 9 months ago
2012
Springer
Gentry’s bootstrapping technique is currently the only known method of obtaining a “pure” fully homomorphic encryption (FHE) schemes, and it may offers performance advantage...