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» Arithmetic Coding for Low Power Embedded System Design
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HOTI
2008
IEEE
14 years 2 months ago
Network Processing on an SPE Core in Cell Broadband Engine
Cell Broadband EngineTM is a multi-core system on a chip and is composed of a general-purpose Power Processing Element (PPE) and eight Synergistic Processing Elements (SPEs). Its ...
Yuji Kawamura, Takeshi Yamazaki, Hiroshi Kyusojin,...
EUROSYS
2010
ACM
14 years 4 months ago
Reverse Engineering of Binary Device Drivers with RevNIC
This paper presents a technique that helps automate the reverse engineering of device drivers. It takes a closed-source binary driver, automatically reverse engineers the driverâ€...
Vitaly Chipounov, George Candea
CODES
2003
IEEE
14 years 1 months ago
A multiobjective optimization model for exploring multiprocessor mappings of process networks
In the Sesame framework, we develop a modeling and simulation environment for the efï¬cient design space exploration of heterogeneous embedded systems. Since Sesame recognizes se...
Cagkan Erbas, Selin C. Erbas, Andy D. Pimentel
CODES
2005
IEEE
14 years 1 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
CODES
2009
IEEE
14 years 2 months ago
FRA: a flash-aware redundancy array of flash storage devices
Since flash memory has many attractive characteristics such as high performance, non-volatility, low power consumption and shock resistance, it has been widely used as storage med...
Yangsup Lee, Sanghyuk Jung, Yong Ho Song