260 search results - page 11 / 52 » Array SSA Form and Its Use in Parallelization |
117
Voted
ICCD
2005
IEEE
15 years 11 months ago
2005
IEEE
FPGAs (Field-Programmable Gate Arrays) are often used as coprocessors to boost the performance of dataintensive applications [1, 2]. However, mapping algorithms onto multimillion-...
118
Voted
IPPS
2008
IEEE
15 years 9 months ago
2008
IEEE
This paper introduces an adaptive parallel pipeline pattern which follows the GRASP (Grid-Adaptive Structured Parallelism) methodology. GRASP is a generic methodology to incorpora...
137
Voted
AIPR
2003
IEEE
15 years 7 months ago
2003
IEEE
This paper presents an approach of fusing images from many video cameras or a moving video camera with external orientation data (e.g. GPS and INS data) into a few mosaiced images...
139
Voted
TPDS
1998
15 years 2 months ago
1998
This paper presents a new compiler optimization algorithm that parallelizes applications for symmetric, sharedmemory multiprocessors. The algorithm considers data locality, parall...
97
Voted
ISCAS
2005
IEEE
15 years 8 months ago
2005
IEEE
Abstract— The mixed-signal processor performs digital vectormatrix multiplication using internally analog fine-grain parallel computing. The three-transistor CID/DRAM unit cell ...