260 search results - page 37 / 52 » Array SSA Form and Its Use in Parallelization |
FPGA
2003
ACM
14 years 21 days ago
2003
ACM
One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...
ICDCS
2009
IEEE
14 years 4 months ago
2009
IEEE
While it is well known that network coding achieves optimal flow rates in multicast sessions, its potential for practical use has remained to be a question, due to its high compu...
PPL
2008
13 years 7 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
IVC
2000
13 years 7 months ago
2000
This paper discusses our expert system called Integrated System for Facial Expression Recognition (ISFER), which performs recognition and emotional classification of human facial ...
EDOC
2003
IEEE
14 years 24 days ago
2003
IEEE
One of the most significant limitations of current middleware platforms, both commercial and research, is that they typically support only a small, pre-defined, set of fundamental...