67 search results - page 4 / 14 » Array-of-arrays architecture for parallel floating point mul... |
SIAMSC
2008
13 years 10 months ago
2008
Given a vector of floating-point numbers with exact sum s, we present an algorithm for calculating a faithful rounding of s, i.e. the result is one of the immediate floating-point ...
TC
2010
13 years 8 months ago
2010
—Due to the widespread use and inherent complexity of floating-point addition, much effort has been devoted to its speedup via algorithmic and circuit techniques. We propose a ne...
SIAMSC
2008
13 years 10 months ago
2008
In this Part II of this paper we first refine the analysis of error-free vector transformations presented in Part I. Based on that we present an algorithm for calculating the round...
WOTUG
2008
13 years 11 months ago
2008
Most motion control systems for mechatronic systems are implemented on digital computers. In this paper we present an FPGA based solution implemented on a low cost Xilinx Spartan I...
PPSC
1993
13 years 11 months ago
1993
Scalable parallel computers with TFLOPS (Trillion FLoating Point Operations Per Second) performance levels are now under construction. While we believe TFLOPS processor technology...