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ISCAS
2006
IEEE
70views Hardware» more  ISCAS 2006»
14 years 1 months ago
Power aware learning for class AB analogue VLSI neural network
—Recent research into artificial neural networks (ANN) has highlighted the potential of using compact analogue ANN hardware cores in embedded mobile devices, where power consumpt...
S. S. Modi, P. R. Wilson, A. D. Brown
ISCAS
2007
IEEE
122views Hardware» more  ISCAS 2007»
14 years 1 months ago
Neuromimetic ICs with analog cores: an alternative for simulating spiking neural networks
- This paper aims at discussing the implementation of simulation systems for SNN based on analog computation cores (neuromimetic ICs). Such systems are an alternative to completely...
Sylvie Renaud, Jean Tomas, Yannick Bornat, Adel Da...
HOTI
2002
IEEE
14 years 14 days ago
Architecture and Hardware for Scheduling Gigabit Packet Streams
We present an architecture and hardware for scheduling gigabit packet streams in server clusters that combines a Network Processor datapath and an FPGA for use in server NICs and ...
Raj Krishnamurthy, Sudhakar Yalamanchili, Karsten ...
ISCAS
2007
IEEE
123views Hardware» more  ISCAS 2007»
14 years 1 months ago
Evaluating Network-on-Chip for Homogeneous Embedded Multiprocessors in FPGAs
— This paper presents performance and area evaluation of a homogeneous multiprocessor communication system based on network-on-chip (NoC) in FPGA platforms. Two homogenous chip m...
Henrique C. Freitas, Dalton M. Colombo, Fernanda L...
ARC
2009
Springer
140views Hardware» more  ARC 2009»
14 years 2 months ago
FPGA-Based Anomalous Trajectory Detection Using SOFM
A system for automatically classifying the trajectory of a moving object in a scene as usual or suspicious is presented. The system uses an unsupervised neural network (Self Organi...
Kofi Appiah, Andrew Hunter, Tino Kluge, Philip Aik...