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ECBS
2009
IEEE
164views Hardware» more  ECBS 2009»
15 years 11 months ago
Semantically Enhanced Containers for Concurrent Real-Time Systems
Future space missions, such as Mars Science Laboratory, are built upon computing platforms providing a high degree of autonomy and diverse functionality. The increased sophisticat...
Damian Dechev, Peter Pirkelbauer, Nicolas Rouquett...
ISCA
2009
IEEE
318views Hardware» more  ISCA 2009»
15 years 11 months ago
Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...
Abhishek Bhattacharjee, Margaret Martonosi
ERSHOV
2009
Springer
15 years 11 months ago
Multi-level Virtual Machine Debugging Using the Java Platform Debugger Architecture
Abstract. Debugging virtual machines (VMs) presents unique challenges, especially meta-circular VMs, which are written in the same language they implement. Making sense of runtime ...
Thomas Würthinger, Michael L. Van De Vanter, ...
CASES
2009
ACM
15 years 11 months ago
A buffer replacement algorithm exploiting multi-chip parallelism in solid state disks
Solid State Disks (SSDs) are superior to magnetic disks from a performance point of view due to the favorable features of NAND flash memory. Furthermore, thanks to improvement on...
Jinho Seol, Hyotaek Shim, Jaegeuk Kim, Seungryoul ...
CF
2009
ACM
15 years 11 months ago
A light-weight fairness mechanism for chip multiprocessor memory systems
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
Magnus Jahre, Lasse Natvig