This paper presents a scheme to combine memory and power management for achieving better energy reduction. Our method periodically adjusts the size of physical memory and the time...
When utilizing reconfigurable hardware there are many applications that will require more memory than is available in a single hardware block. While FPGAs have tools and mechanisms...
ct In the past, program monitoring often operates at the code level, performing checks at function and loop boundaries. Recent research shows that profiling analysis can identify ...
This paper presents an architecture for a persistent object store in which multi-level storage is explicitly included. Traditionally, DBMSs have assumed that all accessible data r...
This paper is testing a DUAL-based model of memory. The model assumes decentralized representation of episodes as a coalition of agents and analogical transfer processes as the bas...
Boicho N. Kokinov, Georgi Petkov, Nadezhda Petrova