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ASPDAC
2005
ACM
106views Hardware» more  ASPDAC 2005»
14 years 5 days ago
Using loop invariants to fight soft errors in data caches
Ever scaling process technology makes embedded systems more vulnerable to soft errors than in the past. One of the generic methods used to fight soft errors is based on duplicati...
Sri Hari Krishna Narayanan, Seung Woo Son, Mahmut ...
ASPDAC
2005
ACM
102views Hardware» more  ASPDAC 2005»
14 years 5 days ago
A framework for automated and optimized ASIP implementation supporting multiple hardware description languages
— Architecture Description Languages (ADLs) are widely used to perform design space exploration for Application Specific Instruction Set Processors (ASIPs). While the design spa...
Oliver Schliebusch, Anupam Chattopadhyay, David Ka...
DAC
2005
ACM
14 years 4 days ago
Dynamic reconfiguration with binary translation: breaking the ILP barrier with software compatibility
In this paper we present the impact of dynamically translating any sequence of instructions into combinational logic. The proposed approach combines a reconfigurable architecture ...
Antonio Carlos Schneider Beck, Luigi Carro
CDES
2006
184views Hardware» more  CDES 2006»
13 years 11 months ago
Compilation for Future Nanocomputer Architectures
Compilation has a long history of translating a programmer's human-readable code into machine instructions designed to make good use of a specific target computer. In this pa...
Thomas P. Way
CSREAESA
2004
13 years 11 months ago
An Energy-Aware Synthesis Methodology for OS-Driven Multi-Process Embedded Software
The growing software content in various battery-driven embedded systems has led to significant interest in technologies for energy-efficient embedded software. While lowenergy sof...
Tat Kee Tan, Anand Raghunathan, Niraj K. Jha