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ITC
2003
IEEE
136views Hardware» more  ITC 2003»
14 years 1 months ago
A BIST Solution for The Test of I/O Speed
A delay-locked loop (DLL) based built-in self test (BIST) circuit has been designed with a 0.18 µ m TSMC process (CM018) to test chip I/O speeds, specifically, the setup and hold...
Cheng Jia, Linda S. Milor
CSFW
1996
IEEE
14 years 24 days ago
An Immunological Approach to Change Detection: Theoretical Results
: This paper examines some of the theoretical foundations of the distributable change detection method introduced by Forrest et al. in [10], including fundamental bounds on some of...
Patrik D'haeseleer
IPPS
2007
IEEE
14 years 2 months ago
An optimistic checkpointing and selective message logging approach for consistent global checkpoint collection in distributed sy
In this paper, we present an asynchronous consistent global checkpoint collection algorithm which prevents contention for network storage at the file server and hence reduces the...
Qiangfeng Jiang, D. Manivannan
DSN
2006
IEEE
14 years 9 days ago
Lucky Read/Write Access to Robust Atomic Storage
This paper establishes tight bounds on the best-case time-complexity of distributed atomic read/write storage implementations that tolerate worst-case conditions. We study asynchr...
Rachid Guerraoui, Ron R. Levy, Marko Vukolic
ISQED
2005
IEEE
108views Hardware» more  ISQED 2005»
14 years 2 months ago
Error Analysis for the Support of Robust Voltage Scaling
Recently, a new Dynamic Voltage Scaling (DVS) scheme has been proposed that increases energy efficiency significantly by allowing the processor to operate at or slightly below the...
David Roberts, Todd M. Austin, David Blaauw, Trevo...