Sciweavers

29 search results - page 3 / 6
» Attractor models of working memory and their modulation by r...
Sort
View
IPPS
2002
IEEE
14 years 9 days ago
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
ISCAS
2002
IEEE
124views Hardware» more  ISCAS 2002»
14 years 8 days ago
Performance optimization of multiple memory architectures for DSP
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
DAC
1998
ACM
14 years 8 months ago
Functional Vector Generation for HDL Models Using Linear Programming and 3-Satisfiability
Abstract-Our strategy for automatic generation of functional vectors is based on exercising selected paths in the given hardware description language (HDL) model. The HDL model des...
Farzan Fallah, Srinivas Devadas, Kurt Keutzer
PADL
2007
Springer
14 years 1 months ago
BAD, a Declarative Logic-Based Language for Brain Modeling
Abstract. We describe a declarative language, called BAD (brain architecture description language), which we have developed for describing and then running brain models. Models are...
Alan H. Bond
ATAL
2010
Springer
13 years 8 months ago
Planning against fictitious players in repeated normal form games
Planning how to interact against bounded memory and unbounded memory learning opponents needs different treatment. Thus far, however, work in this area has shown how to design pla...
Enrique Munoz de Cote, Nicholas R. Jennings