65 search results - page 4 / 13 » Automated Bus Generation for Multiprocessor SoC Design |
99
Voted
DAC
2000
ACM
16 years 4 months ago
2000
ACM
122
Voted
IPPS
2007
IEEE
15 years 10 months ago
2007
IEEE
Emerging heterogeneous multiprocessors will have custom memory and bus architectures that must balance resource sharing and system partitioning to meet cost constraints. We propos...
127
Voted
CODES
2005
IEEE
15 years 9 months ago
2005
IEEE
In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cor...
133
Voted
ISQED
2006
IEEE
15 years 9 months ago
2006
IEEE
Abstract— With the increasing in silicon densities, SoC designs are the stream in modern electronics systems. Accordingly, the verification for SoC designs is crucial. One of th...
141
Voted
CODES
2006
IEEE
15 years 9 months ago
2006
IEEE
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...