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» Automated Configuration of Mixed Integer Programming Solvers
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DAC
2006
ACM
14 years 9 months ago
Optimal cell flipping in placement and floorplanning
In a placed circuit, there are a lot of movable cells that can be flipped to further reduce the total wirelength, without affecting the original placement solution. We aim at solv...
Chiu-Wing Sham, Evangeline F. Y. Young, Chris C. N...
FPGA
1997
ACM
127views FPGA» more  FPGA 1997»
14 years 2 days ago
General Modeling and Technology-Mapping Technique for LUT-Based FPGAs
We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
Amit Chowdhary, John P. Hayes
COR
2006
113views more  COR 2006»
13 years 8 months ago
Capacitated facility location problem with general setup cost
This paper presents an extension of the capacitated facility location problem (CFLP), in which the general setup cost functions and multiple facilities in one site are considered....
Ling-Yun Wu, Xiang-Sun Zhang, Ju-Liang Zhang
ENDM
2010
167views more  ENDM 2010»
13 years 5 months ago
Column Generation based Primal Heuristics
In the past decade, significant progress has been achieved in developing generic primal heuristics that made their way into commercial mixed integer programming (MIP) solver. Exte...
C. Joncour, S. Michel, R. Sadykov, D. Sverdlov, Fr...
DAC
2006
ACM
14 years 9 months ago
Simultaneous time slack budgeting and retiming for dual-Vdd FPGA power reduction
Field programmable dual-Vdd interconnects are effective to reduce FPGA power. Assuming uniform length interconnects, existing work has developed time slack budgeting to minimize p...
Yu Hu, Yan Lin, Lei He, Tim Tuan