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» Automated Design of Quantum Circuits
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DAC
2004
ACM
14 years 10 months ago
Efficient on-line testing of FPGAs with provable diagnosabilities
We present novel and efficient methods for on-line testing in FPGAs. The testing approach uses a ROving TEster (ROTE), which has provable diagnosabilities and is also faster than ...
Vinay Verma, Shantanu Dutt, Vishal Suthar
DAC
2005
ACM
14 years 10 months ago
Multilevel full-chip routing for the X-based architecture
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
Tsung-Yi Ho, Chen-Feng Chang, Yao-Wen Chang, Sao-J...
DAC
2009
ACM
14 years 10 months ago
A direct integral-equation solver of linear complexity for large-scale 3D capacitance and impedance extraction
State-of-the-art integral-equation-based solvers rely on techniques that can perform a matrix-vector multiplication in O(N) complexity. In this work, a fast inverse of linear comp...
Wenwen Chai, Dan Jiao, Cheng-Kok Koh
DAC
2004
ACM
14 years 10 months ago
Exploiting structure in symmetry detection for CNF
Instances of the Boolean satisfiability problem (SAT) arise in many areas of circuit design and verification. These instances are typically constructed from some human-designed ar...
Paul T. Darga, Mark H. Liffiton, Karem A. Sakallah...
DAC
2004
ACM
14 years 10 months ago
Placement feedback: a concept and method for better min-cut placements
The advent of strong multi-level partitioners has made topdown min-cut placers a favored choice for modern placer implementations. We examine terminal propagation, an important st...
Andrew B. Kahng, Sherief Reda