444 search results - page 15 / 89 » Automated Logical Verification Based on Trace Abstractions |
PTS
2008
13 years 10 months ago
2008
We present in this paper a framework, RMOR, for monitoring the execution of C programs against state machines, expressed in a textual (nongraphical) format in files separate from t...
ESWS
2008
Springer
13 years 10 months ago
2008
Springer
tract State Machines to Concurrent Transaction Logic Dumitru Roman1 , Michael Kifer2 , and Dieter Fensel1 1 STI Innsbruck, Austria 2 State University of New York at Stony Brook, US...
DAC
2006
ACM
14 years 9 months ago
2006
ACM
Design and verification of systems at the Register-Transfer (RT) or behavioral level require the ability to reason at higher levels of abstraction. Difference logic consists of an...
FORMATS
2004
Springer
14 years 2 months ago
2004
Springer
Abstract. In this paper we introduce a variant of temporal logic tailored for specifying desired properties of continuous signals. The logic is based on a bounded subset of the rea...
CAV
2009
Springer
14 years 9 months ago
2009
Springer
Abstract. When a model does not satisfy a given specification, a counterexample is produced by the model checker to demonstrate the failure. A user must then examine the counterexa...