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DAC
2000
ACM
14 years 10 months ago
Self-test methodology for at-speed test of crosstalk in chip interconnects
The effect of crosstalk errors is most significant in highperformance circuits, mandating at-speed testing for crosstalk defects. This paper describes a self-test methodology that...
Xiaoliang Bai, Sujit Dey, Janusz Rajski
PTS
2003
136views Hardware» more  PTS 2003»
13 years 10 months ago
The UML 2.0 Testing Profile and Its Relation to TTCN-3
UML models focus primarily on the definition of system structure and behaviour, but provide only limited means for describing test objectives and test procedures. However, with the...
Ina Schieferdecker, Zhen Ru Dai, Jens Grabowski, A...
GECCO
2008
Springer
172views Optimization» more  GECCO 2008»
13 years 10 months ago
Empirical analysis of a genetic algorithm-based stress test technique
Evolutionary testing denotes the use of evolutionary algorithms, e.g., Genetic Algorithms (GAs), to support various test automation tasks. Since evolutionary algorithms are heuris...
Vahid Garousi
IIE
2007
159views more  IIE 2007»
13 years 9 months ago
Creating and Visualizing Test Data from Programming Exercises
Automatic assessment of programming exercises is typically based on testing approach. Most automatic assessment frameworks execute tests and evaluate test results automatically, bu...
Petri Ihantola
TCAD
2002
73views more  TCAD 2002»
13 years 8 months ago
System-on-a-chip test scheduling with precedence relationships, preemption, and power constraints
Test scheduling is an important problem in system-on-a-chip (SOC) test automation. Efficient test schedules minimize the overall system test application time, avoid test resource c...
Vikram Iyengar, Krishnendu Chakrabarty