Sciweavers

4359 search results - page 148 / 872
» Automated Pipeline Design
Sort
View
104
Voted
ASYNC
2002
IEEE
90views Hardware» more  ASYNC 2002»
15 years 8 months ago
An Event Spacing Experiment
Events in self-timed rings can propagate evenly spaced or as bursts. By studying these phenomena, we obtain a better understanding of the underlying dynamics of self-timed pipelin...
Mark R. Greenstreet, Anthony Winstanley, Aurelien ...
112
Voted
APCSAC
2000
IEEE
15 years 7 months ago
Cost/Performance Tradeoff of n-Select Square Root Implementations
Hardware square-root units require large numbers of gates even for iterative implementations. In this paper, we present four low-cost high-performance fullypipelined n-select impl...
Wanming Chu, Yamin Li
ICCD
2000
IEEE
137views Hardware» more  ICCD 2000»
15 years 7 months ago
Skewed CMOS: Noise-Immune High-Performance Low-Power Static Circuit Family
In this paper; we present a noise-immune highperformance static circuit family suitable for low-voltage operation called skewed logic. Skewed logic circuits, in comparison with Do...
Alexandre Solomatnikov, Kaushik Roy, Cheng-Kok Koh...
VLSID
1993
IEEE
133views VLSI» more  VLSID 1993»
15 years 7 months ago
An Area-Efficient Systolic Architecture for Real-Time VLSI Finite Impulse Response Filters
An area-eficzent systolic architecture for realtime, programmable-coeBcient jinite impulse response (FIR)filters is presented. A technique called pipelined clustering is introduce...
V. Visvanathan, Nibedita Mohanty, S. Ramanathan
VISUALIZATION
1994
IEEE
15 years 7 months ago
Parallel Performance Measures for Volume Ray Casting
We describe a technique for achieving fast volume ray casting on parallel machines, using a load balancing scheme and an e cient pipelined approach to compositing. We propose a ne...
Cláudio T. Silva, Arie E. Kaufman