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ISCAS
2007
IEEE
107views Hardware» more  ISCAS 2007»
14 years 2 months ago
Architecture Level Power-Performance Tradeoffs for Pipelined Designs
Abstract—This paper presents a method to investigate powerperformance tradeoffs in digital pipelined designs. The method is applied at the architectural level of the design. It w...
Haider Ali, Bashir M. Al-Hashimi
ICPR
2000
IEEE
14 years 10 days ago
Color Appearance and the Digital Imaging Pipeline
An effective image reproduction pipeline, spanning image capture, processing and display, must be designed to account for the properties of the human observer. In designing an ima...
Brian A. Wandell
SCANGIS
2003
13 years 9 months ago
Routing Using Geospatial Information System Analysis
A prototype least cost pipeline routing was performed using various data and GIS analysis. Ahvaz-Marun oil pipeline in south west of IRAN was chosen for development of the prototy...
Mahmoud Reza Delavar, Fereydoon Naghibi
DAC
2000
ACM
14 years 9 months ago
The design and use of simplepower: a cycle-accurate energy estimation tool
In this paper, we presen t the design and use of a comprehensiv e framework, SimplePower, for evaluating the e ect of high-level algorithmic, architectural, and compilation tradeo...
Wu Ye, Narayanan Vijaykrishnan, Mahmut T. Kandemir...
IPPS
2006
IEEE
14 years 2 months ago
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...