106 search results - page 4 / 22 » Automated Source-Level Error Localization in Hardware Design... |
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
Since pre-silicon functional verification is insufficient to detect all design errors, re-spins are often needed due to malfunctions that escape into the silicon. This paper pre...
ATS
2010
IEEE
13 years 5 months ago
2010
IEEE
One of the most challenging problems in post-silicon validation is to identify those errors that cause prohibitive extra delay on speedpaths in the circuit under debug (CUD) and o...
ICCAD
2007
IEEE
14 years 4 months ago
2007
IEEE
Modern IC designs have reached unparalleled levels of complexity, resulting in more and more bugs discovered after design tape-out However, so far only very few EDA tools for post...
DSD
2008
IEEE
14 years 1 months ago
2008
IEEE
Abstract—In two recent contributions [1], [2], we have provided a comparative analysis of various optimization algorithms, which can be used for atomic location estimation, and s...
DSN
2002
IEEE
14 years 13 days ago
2002
IEEE
A virtual duplex system (VDS) can be used to increase safety without the use of structural redundancy on a single machine. If a deterministic program P is calculating a given func...