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» Automated Synthesis of Multitolerance
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TCAD
2010
121views more  TCAD 2010»
13 years 2 months ago
Translation Validation of High-Level Synthesis
The growing complexity of systems and their implementation into silicon encourages designers to look for model designs at higher levels of abstraction and then incrementally build ...
Sudipta Kundu, Sorin Lerner, Rajesh K. Gupta
FCCM
2011
IEEE
331views VLSI» more  FCCM 2011»
12 years 11 months ago
Synthesis of Platform Architectures from OpenCL Programs
—The problem of automatically generating hardware modules from a high level representation of an application has been at the research forefront in the last few years. In this pap...
Muhsen Owaida, Nikolaos Bellas, Konstantis Dalouka...
ICFP
2012
ACM
11 years 10 months ago
Proof-producing synthesis of ML from higher-order logic
The higher-order logic found in proof assistants such as Coq and various HOL systems provides a convenient setting for the development and verification of pure functional program...
Magnus O. Myreen, Scott Owens
DAC
2009
ACM
14 years 8 months ago
Low power gated bus synthesis using shortest-path Steiner graph for system-on-chip communications
Power consumption of system-level on-chip communications is becoming more significant in the overall system-on-chip (SoC) power as technology scales down. In this paper, we propos...
Renshen Wang, Nan-Chi Chou, Bill Salefski, Chung-K...
DAC
2008
ACM
14 years 8 months ago
Automatic synthesis of clock gating logic with controlled netlist perturbation
Clock gating is the insertion of combinational logic along the clock path to prevent the unnecessary switching of registers and reduce dynamic power consumption. The conditions un...
Aaron P. Hurst