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» Automated path generation for software fault localization
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DSN
2002
IEEE
14 years 15 days ago
Detecting Processor Hardware Faults by Means of Automatically Generated Virtual Duplex Systems
A virtual duplex system (VDS) can be used to increase safety without the use of structural redundancy on a single machine. If a deterministic program P is calculating a given func...
Markus Jochim
ICST
2010
IEEE
13 years 6 months ago
Automated Behavioral Regression Testing
—When a program is modified during software evolution, developers typically run the new version of the program against its existing test suite to validate that the changes made ...
Wei Jin, Alessandro Orso, Tao Xie
DATE
1998
IEEE
92views Hardware» more  DATE 1998»
13 years 11 months ago
Fast Sequential Circuit Test Generation Using High-Level and Gate-Level Techniques
A new approach for sequential circuit test generation is proposed that combines software testing based techniques at the high level with test enhancement techniques at the gate le...
Elizabeth M. Rudnick, Roberto Vietti, Akilah Ellis...
KBSE
2009
IEEE
14 years 2 months ago
Evaluating the Accuracy of Fault Localization Techniques
—We investigate claims and assumptions made in several recent papers about fault localization (FL) techniques. Most of these claims have to do with evaluating FL accuracy. Our in...
Shaimaa Ali, James H. Andrews, Tamilselvi Dhandapa...
IOLTS
2000
IEEE
105views Hardware» more  IOLTS 2000»
13 years 12 months ago
Comparison between Random and Pseudo-Random Generation for BIST of Delay, Stuck-at and Bridging Faults
The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
Patrick Girard, Christian Landrault, Serge Pravoss...