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30
search results - page 2 / 6
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Automated synthesis for asynchronous FPGAs
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DAC
2007
ACM
149
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Computer Architecture
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DAC 2007
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DDBDD: Delay-Driven BDD Synthesis for FPGAs
14 years 8 months ago
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www.icims.csl.uiuc.edu
Lei Cheng, Deming Chen, Martin D. F. Wong
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DAC
1999
ACM
141
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Computer Architecture
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DAC 1999
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Automatic Synthesis and Optimization of Partially Specified Asynchronous Systems
14 years 8 months ago
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www.lsi.upc.es
Alex Kondratyev, Jordi Cortadella, Michael Kishine...
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ACSD
2005
IEEE
144
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Hardware
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ACSD 2005
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An Automated Fine-Grain Pipelining Using Domino Style Asynchronous Library
14 years 1 months ago
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mark.bu.edu
Register Transfer Level (RTL) synthesis model which simplified the design of clocked circuits allowed design automation boost and VLSI progress for more than a decade. Shrinking t...
Alexander B. Smirnov, Alexander Taubin, Ming Su, M...
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DAC
2003
ACM
148
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Computer Architecture
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DAC 2003
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Global resource sharing for synthesis of control data flow graphs on FPGAs
14 years 8 months ago
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www.utdallas.edu
Seda Ogrenci Memik, Gokhan Memik, Roozbeh Jafari, ...
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DAC
2003
ACM
136
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Computer Architecture
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DAC 2003
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High-level synthesis of asynchronous systems by data-driven decomposition
14 years 8 months ago
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www.async.caltech.edu
Catherine G. Wong, Alain J. Martin
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