101 search results - page 9 / 21 » Automatic Clock Abstraction from Sequential Circuits |
FPGA
2004
ACM
14 years 1 months ago
2004
ACM
We present the design of a high-performance, highly pipelined asynchronous FPGA. We describe a very fine-grain pipelined logic block and routing interconnect architecture, and sh...
SIGCSE
2009
ACM
14 years 8 months ago
2009
ACM
ion and Extensibility in Digital Logic Simulation Software Richard M. Salter and John L. Donaldson Computer Science Department Oberlin College Oberlin, OH 44074 rms@cs.oberlin.edu,...
ICCAD
1998
IEEE
13 years 12 months ago
1998
IEEE
Abstract Althoughtremendousadvanceshave been accomplished in logic synthesis in the past two decades, in some cases logic synthesis still cannot attain the improvements possible by...
ICPR
2000
IEEE
14 years 1 days ago
2000
IEEE
This paper describes an infrastructure that enables transparent development of image processing software for parallel computers. The infrastructure’s main component is an image ...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
Abstract— We present an SoC testing approach that integrates test data compression, TAM/test wrapper design, and test scheduling. An improved LFSR reseeding technique is used as ...