122 search results - page 7 / 25 » Automatic Data Path Generation from C code for Custom Proces... |
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
We present a methodology for generating optimized architectures for data bandwidth constrained extensible processors. We describe a scalable Integer Linear Programming (ILP) formu...
DATE
2010
IEEE
14 years 1 days ago
2010
IEEE
—We present Huckleberry, a tool for automatically generating parallel implementations for multi-core platforms from sequential recursive divide-and-conquer programs. The recursiv...
FCCM
2011
IEEE
12 years 10 months ago
2011
IEEE
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...
HIPEAC
2010
Springer
13 years 9 months ago
2010
Springer
We present Offload, a programming model for offloading parts of a C++ application to run on accelerator cores in a heterogeneous multicore system. Code to be offloaded is enclosed ...
VLSID
2008
IEEE
14 years 7 months ago
2008
IEEE
In the automatic design of custom instruction set processors, there can be a very large set of potential custom instructions, from which a few instructions are required to be chos...