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ITCC
2005
IEEE
14 years 1 months ago
Pareto-Optimal Hardware for Substitution Boxes
: In this paper, we propose a methodology based on genetic programming to automatically generate hardware designs of substitution boxes necessary for many cryptosystems such as DES...
Nadia Nedjah, Luiza de Macedo Mourelle
ASPDAC
2005
ACM
153views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Design of clocked circuits using UML
– Clocking is an essential component of any embedded system design. However, traditional design techniques are either short of clocking support or too complex for users. The Unif...
Zhenxin Sun, Weng-Fai Wong, Yongxin Zhu, Santhosh ...
DAC
2005
ACM
14 years 8 months ago
Automatic generation of customized discrete fourier transform IPs
This paper presents a parameterized soft core generator for the discrete Fourier transform (DFT). Reusable IPs of digital signal processing (DSP) kernels are important time-saving...
Grace Nordin, Peter A. Milder, James C. Hoe, Marku...
DATE
2006
IEEE
107views Hardware» more  DATE 2006»
14 years 1 months ago
Flexible specification and application of rule-based transformations in an automotive design flow
This paper addresses an XML-based design environment, which provides a powerful basis for the manipulation of hardware design descriptions. The contribution of the paper is a flex...
Jan-Hendrik Oetjens, Joachim Gerlach, Wolfgang Ros...
ICCAD
2001
IEEE
102views Hardware» more  ICCAD 2001»
14 years 4 months ago
Simulation-Based Automatic Generation of Signomial and Posynomial Performance Models for Analog Integrated Circuit Sizing
This paper presents a method to automatically generate posynomial response surface models for the performance parameters of analog integrated circuits. The posynomial models enabl...
Walter Daems, Georges G. E. Gielen, Willy M. C. Sa...