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DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
14 years 1 months ago
A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing
1-The increasing cost for System-on-Chip (SOC) testing is mainly due to the huge test data volumes that lead to long test application time and require large automatic test equipmen...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
ASPLOS
2010
ACM
13 years 10 months ago
Orthrus: efficient software integrity protection on multi-cores
This paper proposes an efficient hardware/software system that significantly enhances software security through diversified replication on multi-cores. Recent studies show that a ...
Ruirui Huang, Daniel Y. Deng, G. Edward Suh
ICS
2009
Tsinghua U.
14 years 2 months ago
Parametric multi-level tiling of imperfectly nested loops
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
Albert Hartono, Muthu Manikandan Baskaran, C&eacut...
PADL
2004
Springer
14 years 23 days ago
Improved Compilation of Prolog to C Using Moded Types and Determinism Information
We describe the current status of and provide performance results for a prototype compiler of Prolog to C, ciaocc. ciaocc is novel in that it is designed to accept different kinds...
José F. Morales, Manuel Carro, Manuel V. He...
ECCV
2008
Springer
14 years 9 months ago
GeoS: Geodesic Image Segmentation
This paper presents GeoS, a new algorithm for the efficient segmentation of n-dimensional image and video data. The segmentation problem is cast as approximate energy minimization ...
Antonio Criminisi, Toby Sharp, Andrew Blake