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ASPDAC
2004
ACM
94views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Improving simulation-based verification by means of formal methods
The design of complex systems is largely ruled by the time needed for verification. Even though formal methods can provide higher reliability, in practice often simulation based ve...
Görschwin Fey, Rolf Drechsler
CHES
2006
Springer
205views Cryptology» more  CHES 2006»
14 years 1 months ago
Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks
Balanced dynamic dual-rail gates and asynchronous circuits have been shown, if implemented correctly, to have natural and efficient resistance to side-channel attacks. Despite thei...
Konrad J. Kulikowski, Alexander B. Smirnov, Alexan...
FOSSACS
2006
Springer
14 years 1 months ago
A Logic of Reachable Patterns in Linked Data-Structures
We define a new decidable logic for expressing and checking invariants of programs that manipulate dynamically-allocated objects via pointers and destructive pointer updates. The ...
Greta Yorsh, Alexander Moshe Rabinovich, Mooly Sag...
CAV
2001
Springer
154views Hardware» more  CAV 2001»
14 years 1 months ago
Automated Verification of a Randomized Distributed Consensus Protocol Using Cadence SMV and PRISM
We consider the randomized consensus protocol of Aspnes and Herlihy for achieving agreement among N asynchronous processes that communicate via read/write shared registers. The alg...
Marta Z. Kwiatkowska, Gethin Norman, Roberto Segal...
FMCAD
2000
Springer
14 years 1 months ago
Automated Refinement Checking for Asynchronous Processes
Abstract. We consider the problem of refinement checking for asynchronous processes where refinement corresponds to stutter-closed language inclusion. Since an efficient algorithmi...
Rajeev Alur, Radu Grosu, Bow-Yaw Wang