Sciweavers

86 search results - page 14 / 18
» Automatic Synthesis of Sequential Synchronizations
Sort
View
ICDCS
1997
IEEE
13 years 12 months ago
Concurrency Control and View Notification Algorithms for Collaborative Replicated Objects
—This paper describes algorithms for implementing a high-level programming model for synchronous distributed groupware applications. In this model, several application data objec...
Robert E. Strom, Guruduth Banavar, Kevan Miller, A...
SBCCI
2006
ACM
171views VLSI» more  SBCCI 2006»
14 years 1 months ago
Asynchronous circuit design on reconfigurable devices
This paper presents the design of asynchronous circuits on synchronous FPGAs and CPLDs. Different design styles have been investigated through the implementation of dual-rail full...
R. U. R. Mocho, G. H. Sartori, Renato P. Ribas, An...
CHARME
1995
Springer
120views Hardware» more  CHARME 1995»
13 years 11 months ago
Timing analysis of asynchronous circuits using timed automata
In this paper we present a method formodeling asynchronous digital circuits by timed automata. The constructed timed automata serve as \mechanical" and veri able objects for a...
Oded Maler, Amir Pnueli
ICCAD
2007
IEEE
165views Hardware» more  ICCAD 2007»
13 years 11 months ago
Automated refinement checking of concurrent systems
Stepwise refinement is at the core of many approaches to synthesis and optimization of hardware and software systems. For instance, it can be used to build a synthesis approach for...
Sudipta Kundu, Sorin Lerner, Rajesh Gupta
CHES
2006
Springer
205views Cryptology» more  CHES 2006»
13 years 11 months ago
Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks
Balanced dynamic dual-rail gates and asynchronous circuits have been shown, if implemented correctly, to have natural and efficient resistance to side-channel attacks. Despite thei...
Konrad J. Kulikowski, Alexander B. Smirnov, Alexan...