247 search results - page 24 / 50 » Automatic Test Data Generation Using Constraint Solving Tech... |
IJCAI
1989
13 years 8 months ago
1989
gn problem can be abstractly characterized as a constrained function-to-structure mapping. The de sign task takes as input the specifications of the desired functions of a device...
DAC
2000
ACM
14 years 8 months ago
2000
ACM
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...
DFT
2003
IEEE
14 years 28 days ago
2003
IEEE
Test scheduling and Test Access Mechanism (TAM) design are two important tasks in the development of a System-on-Chip (SOC) test solution. Previous test scheduling techniques assu...
JSS
2008
13 years 6 months ago
2008
This report presents a model-driven, stress test methodology aimed at increasing chances of discovering faults related to network traffic in Distributed Real-Time Systems (DRTS). T...
PLDI
2004
ACM
14 years 1 months ago
2004
ACM
When vectorizing for SIMD architectures that are commonly employed by today’s multimedia extensions, one of the new challenges that arise is the handling of memory alignment. Pr...