302 search results - page 10 / 61 » Automatic Verification of Timed Circuits |
FMCAD
2007
Springer
14 years 1 months ago
2007
Springer
Parameterized heuristics abound in computer aided design and verification, and manual tuning of the respective parameters is difficult and time-consuming. Very recent results from ...
ENTCS
2006
13 years 9 months ago
2006
The approaches to automatic formal verification of UML models known up to now require a finite bound on the number of objects existing at each point in time. In [4] we have observ...
ICCAD
2003
IEEE
14 years 6 months ago
2003
IEEE
Modeling frequency-dependent nonlinear characteristics of complex analog blocks and subsystems is critical for enabling efficient verification of mixed-signal system designs. Rece...
ENTCS
2002
13 years 9 months ago
2002
We report on the automatic verification of timed probabilistic properties of the IEEE 1394 root contention protocol combining two existing tools: the real-time modelchecker Kronos...
DATE
2000
IEEE
14 years 2 months ago
2000
IEEE
In current microprocessors and systems, an increasingly high silicon portion is derived through automatic synthesis, with designers working exclusively at the RT-level, and design...