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» Automatic Verification of Timed Circuits
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DAC
1999
ACM
14 years 3 months ago
Test Generation for Gigahertz Processors Using an Automatic Functional Constraint Extractor
As the sizes of general and special purpose processors increase rapidly, generating high quality manufacturing tests which can be run at native speeds is becoming a serious proble...
Raghuram S. Tupuri, Arun Krishnamachary, Jacob A. ...

Publication
295views
12 years 9 months ago
The Age of Analog Networks.
A large class of systems of biological and technological relevance can be described as analog networks, that is, collections of dynamic devices interconnected by links of varying s...
Claudio Mattiussi, Daniel Marbach, Peter Dürr, Da...
RECONFIG
2008
IEEE
224views VLSI» more  RECONFIG 2008»
14 years 5 months ago
Automatic Construction of Large-Scale Regular Expression Matching Engines on FPGA
—We present algorithms for implementing large-scale regular expression matching (REM) on FPGA. Based on the proposed algorithms, we develop tools that first transform regular ex...
Yi-Hua E. Yang, Viktor K. Prasanna
TVLSI
2008
119views more  TVLSI 2008»
13 years 10 months ago
Automatic Design of Reconfigurable Domain-Specific Flexible Cores
Reconfigurable hardware is ideal for use in Systems-on-a-Chip, as it provides both hardware-level performance and post-fabrication flexibility. However, any one architecture is ra...
Katherine Compton, Scott Hauck
GECCO
2006
Springer
143views Optimization» more  GECCO 2006»
14 years 2 months ago
A hybridized genetic parallel programming based logic circuit synthesizer
Genetic Parallel Programming (GPP) is a novel Genetic Programming paradigm. Based on the GPP paradigm and a local search operator - FlowMap, a logic circuit synthesizing system in...
Wai Shing Lau, Kin-Hong Lee, Kwong-Sak Leung