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DATE
2005
IEEE
134views Hardware» more  DATE 2005»
14 years 1 months ago
Assertion-Based Design Exploration of DVS in Network Processor Architectures
With the scaling of technology and higher requirements on performance and functionality, power dissipation is becoming one of the major design considerations in the development of...
Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang 000...
DATE
2004
IEEE
130views Hardware» more  DATE 2004»
13 years 11 months ago
Utilizing Formal Assertions for System Design of Network Processors
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Fe...
JSA
1998
72views more  JSA 1998»
13 years 7 months ago
Network conscious design of distributed real-time systems
In this paper, we present a network conscious approach to designing distributed real-time systems. Given a task graph design of the system, the end-to-end constraints on the input...
Jung Woo Park, Young Shin Kim, Seongsoo Hong, Mana...
ICC
2009
IEEE
139views Communications» more  ICC 2009»
13 years 5 months ago
Distributed Intrusion Detection with Intelligent Network Interfaces for Future Networks
Abstract--Intrusion detection remains an important and challenging task in current and next generation networks (NGN). Emerging technologies such as multi-core processors and virtu...
Yan Luo, Ke Xiang, Jie Fan, Chunhui Zhang
GECCO
2007
Springer
182views Optimization» more  GECCO 2007»
14 years 2 months ago
Generating large-scale neural networks through discovering geometric regularities
Connectivity patterns in biological brains exhibit many repeating motifs. This repetition mirrors inherent geometric regularities in the physical world. For example, stimuli that ...
Jason Gauci, Kenneth O. Stanley