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CODES
2011
IEEE
12 years 7 months ago
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
Garo Bournoutian, Alex Orailoglu
MBEES
2010
13 years 8 months ago
Towards Architectural Programming of Embedded Systems
: Integrating architectural elements with a modern programming language is essential to ensure a smooth combination of architectural design and programming. In this position statem...
Arne Haber, Jan Oliver Ringert, Bernhard Rumpe
ASAP
2003
IEEE
133views Hardware» more  ASAP 2003»
14 years 21 days ago
Storage Management in Process Networks using the Lexicographically Maximal Preimage
At the Leiden Embedded Research Center, we are developing a compiler called Compaan that automatically translates signal processing applications written in Matlab into Kahn Proces...
Alexandru Turjan, Bart Kienhuis
IPPS
2005
IEEE
14 years 1 months ago
A Compiler and Runtime Infrastructure for Automatic Program Distribution
This paper presents the design and the implementation of a compiler and runtime infrastructure for automatic program distribution. We are building a research infrastructure that e...
Roxana Diaconescu, Lei Wang, Zachary Mouri, Matt C...
DATE
2000
IEEE
140views Hardware» more  DATE 2000»
13 years 11 months ago
Resolution of Dynamic Memory Allocation and Pointers for the Behavioral Synthesis from C
-- One of the greatest challenges in C/C++-based design methodology is to efficiently map C/C++ models into hardware. Many of the networking and multimedia applications implemente...
Luc Séméria, Koichi Sato, Giovanni D...