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VLSID
2003
IEEE
180views VLSI» more  VLSID 2003»
14 years 8 months ago
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
Pao-Ann Hsiung, Shu-Yu Cheng
DSD
2007
IEEE
116views Hardware» more  DSD 2007»
14 years 1 months ago
Evaluating the Model Accuracy in Automated Design Space Exploration
Design space exploration is used to shorten the design time of System-on-Chips (SoCs). The models used in the exploration need to be both accurate and fast to simulate. This paper...
Kalle Holma, Mikko Setälä, Erno Salminen...
ATVA
2009
Springer
149views Hardware» more  ATVA 2009»
14 years 2 months ago
A Decompositional Proof Scheme for Automated Convergence Proofs of Stochastic Hybrid Systems
In this paper, we describe a decompositional approach to convergence proofs for stochastic hybrid systems given as probabilistic hybrid automata. We focus on a concept called “st...
Jens Oehlerking, Oliver E. Theel
JAR
2006
103views more  JAR 2006»
13 years 7 months ago
A Framework for Verifying Bit-Level Pipelined Machines Based on Automated Deduction and Decision Procedures
We describe an approach to verifying bit-level pipelined machine models using a combination of deductive reasoning and decision procedures. While theorem proving systems such as AC...
Panagiotis Manolios, Sudarshan K. Srinivasan
IJCAI
2003
13 years 9 months ago
Formal Verification of Diagnosability via Symbolic Model Checking
This paper addresses the formal verification of diagnosis systems. We tackle the problem of diagnosability: given a partially observable dynamic system, and a diagnosis system obs...
Alessandro Cimatti, Charles Pecheur, Roberto Cavad...