We present a formal verification methodology that we have used on a computer system design project. The methodology integrates a temporal logic model checker with a conventional pr...
Topological predicates, as derived from the 9-intersection model, have been widely recognized in GIS, spatial database systems, and many other geo-related disciplines. They are ba...
Mark McKenney, Alejandro Pauly, Reasey Praing, Mar...
Although many recent advances have been made in hardware synthesis techniques from software programming languages such as C, the performance of synthesized hardware commonly suffe...
Reflection and automated introspection of a design in system level design frameworks are seen as necessities for the CAD tools to manipulate the designs within the tools. These f...
Frederic Doucet, Sandeep K. Shukla, Rajesh K. Gupt...
Component middleware provides dependable and efficient platforms that support key functional, and quality of service (QoS) needs of distributed real-time embedded (DRE) systems. C...