816 search results - page 23 / 164 » Automating Verification by Functional Abstraction at the Sys... |
DAC
1996
ACM
14 years 1 months ago
1996
ACM
Abstract-- It is impractical to verify multiplier or divider circuits entirely at the bit-level using ordered Binary Decision Diagrams (BDDs), because the BDD representations for t...
FLOPS
2008
Springer
13 years 10 months ago
2008
Springer
Narrowing extends rewriting with logic capabilities by allowing free variables in terms and replacing matching with unification. Narrowing has been widely used in different context...
FUIN
2010
13 years 6 months ago
2010
Abstract. Writing dependently typed functional programs that capture non-trivial program properties, such as those involving membership, ordering and non-linear arithmetic, is diff...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Automated synthesis of monitors from high-level properties plays a significant role in assertion-based verification. We present here a methodology to synthesize assertion monitors...
FM
2008
Springer
13 years 10 months ago
2008
Springer
Interface automata provide a formalism capturing the high level interactions between software components. Checking compatibility, and other safety properties, in an automata-based ...