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ISSS
1995
IEEE
161views Hardware» more  ISSS 1995»
13 years 10 months ago
Synthesis of pipelined DSP accelerators with dynamic scheduling
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens,...
ISCC
2005
IEEE
120views Communications» more  ISCC 2005»
14 years 9 days ago
Modular Reference Implementation of an IP-DSLAM
We describe a modular reference implementation of an IPbased DSL access multiplexer (DSLAM). We identify deployment trends and primary tasks a future DSLAM has to offer. The imple...
Christian Sauer, Matthias Gries, Sören Sonnta...
RSP
2003
IEEE
132views Control Systems» more  RSP 2003»
13 years 12 months ago
Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. ...
Prabhat Mishra, Arun Kejariwal, Nikil Dutt
ACSAC
2003
IEEE
13 years 10 months ago
Defending Embedded Systems Against Buffer Overflow via Hardware/Software
Buffer overflow attacks have been causing serious security problems for decades. With more embedded systems networked, it becomes an important research problem to defend embedded ...
Zili Shao, Qingfeng Zhuge, Yi He, Edwin Hsing-Mean...
HIPEAC
2010
Springer
13 years 8 months ago
Offload - Automating Code Migration to Heterogeneous Multicore Systems
We present Offload, a programming model for offloading parts of a C++ application to run on accelerator cores in a heterogeneous multicore system. Code to be offloaded is enclosed ...
Pete Cooper, Uwe Dolinsky, Alastair F. Donaldson, ...