226 search results - page 16 / 46 » BDDs and Automated Deduction |
ICCD
2001
IEEE
14 years 4 months ago
2001
IEEE
Reduced Ordered Binary Decision Diagrams (BDDs) are a data structure for representation and manipulation of Boolean functions which are frequently used in VLSI Design Automation. ...
CADE
2008
Springer
14 years 7 months ago
2008
Springer
CLF (Concurrent LF) [CPWW02a] is a logical framework for specifying and implementing deductive and concurrent systems from areas, such as programming language theory, security prot...
CADE
2004
Springer
14 years 7 months ago
2004
Springer
contexts such as construction of abstractions, speed may be favored over completeness, so that undecidable theories (e.g., nonlinear integer arithmetic) and those whose decision pr...
26
Voted
CSL
2010
Springer
13 years 8 months ago
2010
Springer
Deduction modulo consists in presenting a theory through rewrite rules to support automatic and interactive proof search. It induces proof search methods based on narrowing, such a...
ACL2
2006
ACM
13 years 11 months ago
2006
ACM
We have extended the ACL2 theorem prover to automatically prove properties of VHDL circuits with IBM's Internal SixthSense verification system. We have used this extension to...