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DATE
2010
IEEE
113views Hardware» more  DATE 2010»
14 years 23 days ago
PM-COSYN: PE and memory co-synthesis for MPSoCs
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...
Yi-Jung Chen, Chia-Lin Yang, Po-Han Wang
IPPS
2007
IEEE
14 years 1 months ago
Achieving Reliable Parallel Performance in a VoD Storage Server Using Randomization and Replication
This paper investigates randomization and replication as strategies to achieve reliable performance in disk arrays targeted for video-on-demand (VoD) workloads. A disk array can p...
Yung Ryn Choe, Vijay S. Pai
SELMAS
2005
Springer
14 years 1 months ago
Characterization and Evaluation of Multi-agent System Architectural Styles
We argue that it is useful to study classes of Multi-Agent System (MAS) architectures, corresponding to architectural styles in addition to particular tures. In this work we focus ...
Paul Davidsson, Stefan J. Johansson, Mikael Svahnb...
ICDCS
1996
IEEE
13 years 11 months ago
Dynamic Scheduling Strategies for Shared-memory Multiprocessors
Efficiently scheduling parallel tasks on to the processors of a shared-memory multiprocessor is critical to achieving high performance. Given perfect information at compile-time, ...
Babak Hamidzadeh, David J. Lilja
ICPIA
1992
13 years 11 months ago
Parallel Manipulations of Octrees and Quadtrees
Abstract. Octrees o er a powerful means for representing and manipulating 3-D objects. This paper presents an implementation of octree manipulations using a new approach on a share...
Vipin Chaudhary, K. Kamath, Prakash Arunachalam, J...