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DAMON
2008
Springer
13 years 11 months ago
Avoiding version redundancy for high performance reads in temporal databases
A major performance bottleneck for database systems is the memory hierarchy. The performance of the memory hierarchy is directly related to how the content of disk pages maps to t...
Khaled Jouini, Geneviève Jomier
ISLPED
1999
ACM
143views Hardware» more  ISLPED 1999»
14 years 2 months ago
Reducing power in superscalar processor caches using subbanking, multiple line buffers and bit-line segmentation
Modern microprocessors employ one or two levels of on-chip cachesto bridge the burgeoning speeddisparities between the processor and the RAM. These SRAM caches are a major source ...
Kanad Ghose, Milind B. Kamble
PVM
2010
Springer
13 years 8 months ago
Locality and Topology Aware Intra-node Communication among Multicore CPUs
A major trend in HPC is the escalation toward manycore, where systems are composed of shared memory nodes featuring numerous processing units. Unfortunately, with scale comes compl...
Teng Ma, George Bosilca, Aurelien Bouteiller, Jack...
EXPCS
2007
13 years 11 months ago
Pipeline spectroscopy
Pipeline Spectroscopy is a new technique that allows us to measure the cost of each cache miss. The cost of a miss is displayed (graphed) as a histogram, which represents a precis...
Thomas R. Puzak, Allan Hartstein, Philip G. Emma, ...
ISLPED
2003
ACM
115views Hardware» more  ISLPED 2003»
14 years 3 months ago
Reducing energy and delay using efficient victim caches
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
Gokhan Memik, Glenn Reinman, William H. Mangione-S...