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ICPP
2009
IEEE
14 years 4 months ago
Mapping the FDTD Application to Many-Core Chip Architectures
—This paper reports a study of mapping the Finite Difference Time Domain (FDTD) application to the IBM Cyclops64 (C64) many-core chip architecture [1]. C64 is chosen for this stu...
Daniel Orozco, Guang R. Gao
EEE
2005
IEEE
14 years 3 months ago
Personalization Techniques for Web Search Results Categorization
Generic web search is designed to serve all users, independent of the individual needs and without any adaptation to personal requirements. We propose a novel technique1 that perf...
John D. Garofalakis, Theofanis Matsoukas, Yannis P...
HPCC
2005
Springer
14 years 3 months ago
Memory Subsystem Characterization in a 16-Core Snoop-Based Chip-Multiprocessor Architecture
In this paper we present an exhaustive evaluation of the memory subsystem in a chip-multiprocessor (CMP) architecture composed of 16 cores. The characterization is performed making...
Francisco J. Villa, Manuel E. Acacio, José ...
WMPI
2004
ACM
14 years 3 months ago
Compiler-optimized usage of partitioned memories
In order to meet the requirements concerning both performance and energy consumption in embedded systems, new memory architectures are being introduced. Beside the well-known use o...
Lars Wehmeyer, Urs Helmig, Peter Marwedel
FPGA
2004
ACM
119views FPGA» more  FPGA 2004»
14 years 3 months ago
In-system FPGA prototyping of an itanium microarchitecture
We describe an effort to prototype an Itanium microarchitecture using an FPGA. The microarchitecture model is written in the Bluespec hardware description language (HDL) and suppo...
Roland E. Wunderlich, James C. Hoe