271 search results - page 48 / 55 » Bandwidth-Friendly Cache Hierarchy |
IPPS
1999
IEEE
14 years 2 months ago
1999
IEEE
In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...
CN
2002
13 years 9 months ago
2002
Abstract-The delivery of large files to single users, such as application programs for some versions of the envisioned network computer, or movies, is expected by many to be one of...
SIGMETRICS
1996
ACM
14 years 1 months ago
1996
ACM
A large and increasing gap exists between processor and memory speeds in scalable cache-coherent multiprocessors. To cope with this situation, programmers and compiler writers mus...
TON
2008
13 years 9 months ago
2008
-- Internet routers and Ethernet switches contain packet buffers to hold packets during times of congestion. Packet buffers are at the heart of every packet switch and router, whic...
VLSID
2001
IEEE
14 years 10 months ago
2001
IEEE
Memory represents a major bottleneck in modern embedded systems. Traditionally, memory organizationsfor programmable systems assumed a fixed cache hierarchy. Withthe wideningproce...