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IPPS
2006
IEEE
14 years 3 months ago
An adaptive system-on-chip for network applications
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...
Roman Koch, Thilo Pionteck, Carsten Albrecht, Erik...
MTV
2006
IEEE
98views Hardware» more  MTV 2006»
14 years 3 months ago
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study
Simulation-based validation of the current industrial processors typically use huge number of test programs generated at instruction set architecture (ISA) level. However, archite...
Heon-Mo Koo, Prabhat Mishra, Jayanta Bhadra, Magdy...
ROBIO
2006
IEEE
469views Robotics» more  ROBIO 2006»
14 years 3 months ago
FPGA-Implementation of Inverse Kinematics and Servo Controller for Robot Manipulator
- The implementation of inverse kinematics and servo controller for robot manipulator using FPGA (Field Programmer Gate Array) is investigated in this paper. Firstly, the mathemati...
Ying-Shieh Kung, Kuan-Hsuan Tseng, Chia-Sheng Chen...
ANCS
2006
ACM
14 years 2 months ago
Design of a web switch in a reconfigurable platform
The increase of the web traffic has created the need for web switches that are able to balance the traffic to the server farms based on their contents (e.g. layer 7 switching). In...
Christoforos Kachris, Stamatis Vassiliadis
ASYNC
2005
IEEE
118views Hardware» more  ASYNC 2005»
14 years 2 months ago
Modeling and Verifying Circuits Using Generalized Relative Timing
We propose a novel technique for modeling and verifying timed circuits based on the notion of generalized relative timing. Generalized relative timing constraints can express not ...
Sanjit A. Seshia, Randal E. Bryant, Kenneth S. Ste...