Sciweavers

1464 search results - page 288 / 293
» Behavioral optimization using the manipulation of timing con...
Sort
View
VLDB
2002
ACM
141views Database» more  VLDB 2002»
14 years 7 months ago
Data page layouts for relational databases on deep memory hierarchies
Relational database systems have traditionally optimized for I/O performance and organized records sequentially on disk pages using the N-ary Storage Model (NSM) (a.k.a., slotted ...
Anastassia Ailamaki, David J. DeWitt, Mark D. Hill
ASPLOS
2010
ACM
14 years 2 months ago
CoreDet: a compiler and runtime system for deterministic multithreaded execution
The behavior of a multithreaded program does not depend only on its inputs. Scheduling, memory reordering, timing, and low-level hardware effects all introduce nondeterminism in t...
Tom Bergan, Owen Anderson, Joseph Devietti, Luis C...
NSPW
2003
ACM
14 years 21 days ago
SELF: a transparent security extension for ELF binaries
The ability to analyze and modify binaries is often very useful from a security viewpoint. Security operations one would like to perform on binaries include the ability to extract...
Daniel C. DuVarney, V. N. Venkatakrishnan, Sandeep...
SODA
2000
ACM
95views Algorithms» more  SODA 2000»
13 years 8 months ago
Towards a theory of cache-efficient algorithms
We present a model that enables us to analyze the running time of an algorithm on a computer with a memory hierarchy with limited associativity, in terms of various cache parameter...
Sandeep Sen, Siddhartha Chatterjee
ICCAD
2003
IEEE
219views Hardware» more  ICCAD 2003»
14 years 4 months ago
A Min-Cost Flow Based Detailed Router for FPGAs
Routing for FPGAs has been a very challenging problem due to the limitation of routing resources. Although the FPGA routing problem has been researched extensively, most algorithm...
Seokjin Lee, Yongseok Cheon, Martin D. F. Wong